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Kynix+Interface - Controllers+TUSB6020ZQE+4660 PCS Kynix+Interface - Controllers+TUSB6020ZQE+4660 PCS Kynix+Interface - Controllers+TUSB6020ZQE+4660 PCS

Kynix+Interface - Controllers+TUSB6020ZQE+4660 PCS

FOB Price:
USD 6.8-12 / Case
Min.Order Quantity:
50 Case
Supply Ability:
3000 Case per Week
Port:
Hongkong
Place of Origin:
Shenzhen
Payment Terms:
Western Union, MoneyGram, Credit Card, PayPal
Brand:
Kynix Semiconductor
Products Model:
TUSB6020ZQE
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Quick Details

  • Brand Name: Kynix Semiconductor

    Model Number: TUSB6020ZQE

    Place of Origin: Shenzhen

Packaging & Delivery

  • Packaging Details: 80-VFBGA
  • Delivery Detail: 1 month

Specifications

It is described as USB 2.0 High-Speed On-the-Go Local Bus Interface Bridge Controller 80-BGA MICROSTAR JUNIOR 0 to 70.

FEATURES
Integrated USB 2.0 OTG PHY ­ Fully Compliant with USB 2.0 Standard and USB 2.0 Transceiver Macrocell Interface (UTMI) Revision 1.05 ­ Optimized One-Port Operation at Low Speed (1.5 Mbps), Full Speed (12 Mbps), and High Speed (480 Mbps) ­ Supports UTMI+3 Level 3 (Host and OTG Devices, High/Full/Low Speed and Preamble Packet) ­ Protection Circuitry to Withstand Possible VBUS Short ­ Use or 24.000-MHz Reference Clock Input as a Crystal or External Clock Driver ­ At-Speed Built-In Self Test (BIST) With Internal Asynchronous Capability Through Loopback ­ On-Chip Integrated Accurate 45- High-Speed Termination, 1.5-k Pullup, and 15-k Pulldown Resistors ­ On-Chip Phase-Locked Loop (PLL) to Reduce Noise on High-Speed Clocks ­ Active Power Consumption Less Than 100 mW VLYNQ 2.0 Interface to External Host Controller ­ High-Speed (150-MHz) Point-to-Point Serial Interface for Direct Connection to Other VLYNQ Interface ­ Supports 4 Receive (RX) and 4 Transmit (TX) Lines ­ Memory-Mapped Master/Slave ­ Hardware Flow Control Internal Loopback Mode ­ Multichannel DMA Controller ­ Integrated List Processor Capable of Parsing Communications Port Programming Interface (CPPI) 3.0-Compliant Buffer Descriptors High-Performance 80-Pin MicroStar BGATM/MicroStar JuniorTM ZQE Package High-Performance 80-Pin PFC Package

USB On-the-Go (OTG) Controller Core ­ Uses Mentor Graphics USB 2.0 OTG Core ­ Dual-Role Controller Can Operate Either as a Function Controller for a USB Peripheral or as the Host/Peripheral in Point-to-Point or Multipoint Communications With Other USB Functions ­ Compliant With the USB 2.0 Standard for High-Speed (480-Mbps) Functions and With OTG Supplement to USB 2.0 Specification ­ Supports OTG Communications With One or More High-, Full-, or Low-Speed Devices ­ Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP) ­ Supports Suspend-and-Resume Signaling ­ Configurable for to 4 Transmit Endpoints to 4 Receive Endpoints ­ Configurable FIFOs, Including the Option of Dynamic FIFO Sizing ­ 16k-Byte RAM for USB Endpoint FIFO Shared by USB In/Out Endpoints ­ Support for External Direct Memory Access (DMA) to FIFOs ­ Soft Connect/Disconnect Option ­ Performs All Transaction Scheduling in Hardware System Control Module ­ Controls Clock and Reset Generation and Distribution ­ Controls and Observes Device Power States ­ Supports External Power Management

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MicroStar BGA, MicroStar Junior are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

The is a USB 2.0 high-speed, on-the-go (OTG) dual-role controller designed for a seamless interface to the VLYNQ serial interface, and is ideal for a wide range of applications. The USB OTG dual-role controller can operate either as a function controller for a USB peripheral or as the host/peripheral in point-to-point or multipoint communications with other functions. The integrated USB 2.0 PHY provides one-port operation at low speed (1.5 Mbps), full speed (12 Mbps), and high speed (480 Mbps). The VLYNQ serial interface is a low pin count, high-speed, point-to-point interface. The device is fully compliant with Universal Serial Bus Specification Revision 2.0 and On-the-Go Supplement to the USB Specification Revision 1.3. ORDERING INFORMATION

(1) (2) TQFP ­ PFC PACKAGE (1) (2) MicroStar BGATM ­ ZQE Reel of 360 Tube of 96 ORDERABLE PART NUMBER TUSB6020ZQE TUSB6020PFC TOP-SIDE MARKING PREVIEW

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.

USB EP Buffer RAM x 8) RSTn SLEEP Power/Reset/Clock Management (PRCM) sys_clk DMA State RAM (DMA FIFOs)

IO Power Distribution Digital Core Power Distribution
Submit Documentation Feedback Product Folder Link(s): TUSB6020
TERMINAL NAME 1.5V_SWEN 3.3V_SWEN CLKIN CPEN ID R1 RSTn ZQE NO. PFC NO. H3 D4 TYPE LVCMOS failsafe (1) LVCMOS USB LVCMOS USB Bias LVCMOS I/O I I/O I RESET STATE 0 ­ DESCRIPTION Switch enable for 1.5-V LDO for VBAT/VBUS switch Switch enable for 3.3-V CP/LDO for VBAT/VBUS switch 19.2-MHz system clock in. Connect directly to ground if not used. 5-V power distribution switch enable USB differential pair USB differential pair

In with pullup GPIO 0 In with pullup GPIO 1 In with pullup GPIO 2 In with pullup GPIO 3 In with pullup GPIO 4 In with pullup GPIO 5 GPIO 6. Input clock source select at reset. In with pullup GPIO6 = HIGH, CLKIN is reference clock. GPIO6 = LOW, XI is reference clock. In with pullup ­ GPIO 7. Must be pulled low for proper operation. It is recommended to tie this signal directly to GND. Indicates default master for OTG. For more information, see On-the-Go Supplement to the USB Specification, Revision 1.2. High-precision external resistor used for calibration (R1 value: k ±1%)

Reserved, must be pulled low by individual pulldown resistors. A 1-k value is recommended.
Reserved, should be left unconnected OTG sleep Test mode. Under normal operation, this signal should be tied directly to GND. Charged, discharged, and monitored for OTG host negotiation protocol and session request protocol. External power distribution switch provides to 500 mA. Digital core power supply, 1.5 V I/O power supply, V 1.5-V analog supply 3.3-V analog supply 1.5-V PLL supply 1.5-V digital supply VLYNQ supply, 3.3 V

Failsafe means that CLKIN can toggle when VDD18 is not present without damaging the part. Submit Documentation Feedback Product Folder Link(s): TUSB6020 3

 
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Verified Supplier - Kynix Semiconductor Kongkong Limited Bussiness Type:  Trading Company,Business Service (Transportation, finance, travel, Ads, etc)
Scale:  11 - 50 People
Country/Region:  China (Mainland)/Asia
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